1. Field of the Invention
The invention relates to a liquid crystal display (LCD) apparatus.
2. Description of the Related Art
In recent years, active matrix type liquid crystal display (LCD) apparatus that employs a thin film transistor (TFT) as a switching element has been developed. On the display area of the active matrix type LCD apparatus, there are provided a plurality of pixels arranged in a matrix, a plurality of scanning lines for sequentially scanning the pixels row by row, and a plurality of data lines for providing data to be written onto the respective pixels. Each of the pixels is provided with a TFT, as a switching element, having a gate electrode connected to a scanning line and a drain electrode connected to a data line; a pixel electrode that is connected to a source electrode of the TFT; a common electrode that is set to a voltage common to all the pixels; and with a auxiliary capacitor for storing charges to maintain the voltage differential between the pixel electrode and the common electrode at a predetermined voltage differential. Here, between the pixel electrode and the common electrode, a liquid crystal, for example, whose orientational state changes in accordance with the voltage differential between the pixel electrode and the common electrode, is provided.
At the periphery of the display area, there are provided a gate driver that is connected to the scanning lines for scanning the TFTs (on/off control of the TFTs) via the scanning lines, and a data driver that is connected to the data lines for outputting a prescribed data voltage to each of the pixels (including the auxiliary capacitor and the liquid crystal, etc.) via the data lines.
The active matrix type LCD apparatus is frequently incorporated in small mobile devices, such as a mobile phone, a digital camera and the like, as a monitor. In this case, it is preferable to make as narrow as possible a frame that is formed at the peripheral parts of the display area. Thus, the gate driver and the source driver that occupy large areas are collectively formed at one of the sides of the frame. With this arrangement of the gate driver and the source driver, their mounting process can also be simplified. However, in such a case, due to their locations of the gate driver and the source driver, the scanning lines and/or the data lines need to be laid around the periphery of the display area (the frame) for a long distance. To reduce the area of the “laid-around” region, a connecting structure for the pixels, in which the number of scanning lines is doubly increased and the number of signal lines is reduced to half, has been devised.
FIG. 18 is a schematic diagram showing an exemplary connection for the pixels in the display screen, which is devised as a method for accomplishing such a narrow frame. This is to share one data line S(i) with the adjacent two pixels P (i, j). In this case, the TFTs that correspond to these two pixels P (i, j) are respectively connected to different scanning lines G (j).
For example, in FIG. 18, the TFT for the upper-left pixel P (1, 1) is connected to the scanning line G (1) and the data line S (1), and the TFT for the immediate right pixel P (1, 2) is connected to the scanning line G (2) and the data line S (1). The pixels P (1, 1) and P (1, 2) are arranged between the scanning line G (1) and the scanning line G (2).
FIG. 19 shows a scanning direction (the respective scanning signal waves) of the scanning lines G (j) when a video signal Vsig is written onto the pixels (i, j) in the foregoing active matrix type LCD apparatus, and also shows a writing sequence between the adjacent pixels P (i, j) that share the data lines S (i). For example, the pixels P (1, j) that are connected to the data line S (1) are written in the order of the pixels P (1, 1), P (1, 2), P (1, 3) and P (1, 4).
In the pixel connection for reducing the number of signal lines to half as described above, the pixels in each row—in particular, the pixels adjacently arranged in the row direction—are respectively connected to the scanning lines that are disposed on different sides relative to the pixels. Therefore, for example, as shown in FIG. 20, if there is a positional displacement (i.e., alignment error) in the locations of pixel electrodes in a direction perpendicular to the extending direction of the scanning lines, parasitic capacitances Cgs1, Cgs2, which are generated between the pixel electrodes and the scanning lines, take different values between the pixels that are disposed adjacent to each other in the extending direction of the scanning lines. In such a case, even when a display signal voltage of the same voltage level is written onto each of the pixels adjacently disposed in the extending direction of the scanning lines, as shown in FIG. 21, the respective level shift voltages ΔV1, ΔV2 that are generated upon the completion of writing the display signal voltage will be different between the adjacent pixels in the extending direction of the scanning lines, causing a problem of a reduction in image quality. FIG. 21 shows voltage changes at the pixels P (1, 1) and P (1, 2) of FIG. 20.